SMART 5 BOOT BLOCK MEMORY FAMILY
E
Start
Bus
Operation
Command
Comments
Write
Write
Erase Setup
Data = 20H
Addr = Within Block to be Erased
Write 20H,
Block Address
Erase
Data = D0H
Confirm
Addr = Within Block to be Erased
Write D0H and
Block Address
Read
Status Register Data
Toggle CE# or OE#
to Update Status Register
Read Status
Register
Suspend Erase
Loop
NO
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
0
YES
Suspend
SR.7 =
Erase
Repeat for subsequent block erasures.
Full Status Check can be done after each block erase, or after a
sequence of block erasures.
1
Write FFH after the last operation to reset device to read array mode.
Full Status
Check if Desired
Block Erase
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Read Status Register
Data (See Above)
Command
Comments
Standby
Check SR.3
1 = VPP Low Detect
1
SR.3 =
0
V
PP
Range Error
Standby
Standby
Check SR.4,5
Both 1 = Command
Sequence Error
1
1
Command Sequence
Error
Check SR.5
1 = Block Erase Error
SR.4,5 =
0
SR.3 MUST be cleared, if set during an erase attempt, before further
attempts are allowed by the Write State Machine.
Block Erase
Error
SR.5 =
0
SR.5 is only cleared by the Clear Status Register Command, in
cases where multiple blocks are erase before full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Block Erase
Successful
0599-08
Figure 9. Automated Block Erase Flowchart
22
ADVANCE INFORMATION
INTEL [ INTEL ]
