E
SMART 5 BOOT BLOCK MEMORY FAMILY
Start
Bus
Operation
Command
Comments
Write
Write
Setup
Program
Data = 40H
Addr = Word/Byte to Program
Write 40H,
Word/Byte Address
Program
Data = Data to Program
Addr = Location to Program
Write Word/Byte
Data/Address
Read
Status Register Data
Toggle CE# or OE#
to Update SRD.
Read
Status Register
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
NO
SR.7 = 1
?
Repeat for subsequent word/byte program operations.
SR Full Status Check can be done after each word/byte
program operation, or after a sequence of word/byte programs.
Write FFH after the last program operation to reset device to
read array mode.
YES
Full Status
Check if Desired
Word/Byte Program
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Read Status Register
Data (See Above)
Command
Comments
Standby
Check SR.3
1 = VPP Low Detect
1
SR.3 =
0
VPP Range Error
Standby
Check SR.4
1 = Word Byte Program Error
1
Word/Byte Program
Error
SR.4 =
0
SR.3 MUST be cleared, if set during a program attempt,
before further attempts are allowed by the Write State Machine.
SR.4 is only cleared by the Clear Status Register Command, in cases
where multiple bytes are programmed before full status is checked.
Word/Byte Program
Successful
If error is detected, clear the Status Register before attempting
retry or other error recovery.
0599-07
Figure 8. Automated Word/Byte Program Flowchart
21
ADVANCE INFORMATION
INTEL [ INTEL ]
