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80960JD-40 参数 Datasheet PDF下载

80960JD-40图片预览
型号: 80960JD-40
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式32位微处理器 [EMBEDDED 32-BIT MICROPROCESSOR]
分类和应用: 微处理器
文件页数/大小: 61 页 / 1555 K
品牌: INTEL [ INTEL ]
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80960JD  
A
Table 5. Pin Description — Interrupt Unit Signals  
DESCRIPTION  
NAME  
TYPE  
XINT7:0  
I
EXTERNAL INTERRUPT pins are used to request interrupt service. The XINT7:0  
A(E/L)  
pins can be configured in three modes:  
Dedicated Mode: Each pin is assigned a dedicated interrupt level. Dedicated inputs  
can be programmed to be level (low) or edge (falling) sensitive.  
Expanded Mode: All eight pins act as a vectored interrupt source. The interrupt pins  
are level sensitive in this mode.  
Mixed Mode:  
The XINT7:5 pins act as dedicated sources and the XINT4:0 pins  
act as the five most significant bits of a vectored source. The least  
significant bits of the vectored source are set to 0102 internally.  
Unused external interrupt pins should be connected to VCC  
.
NMI  
I
NON-MASKABLE INTERRUPT causes a non-maskable interrupt event to occur.  
A(E)  
NMI is the highest priority interrupt source and is falling edge-triggered. If NMI is  
unused, it should be connected to VCC  
.
12  
PRELIMINARY