Pentium® III Processor for the PGA370 Socket at 500 MHz to 866 MHz
Table 2. Voltage Identification Definition 1, 2
VID3
VID2
VID1
VID0
Vcc
CORE
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.30
1.35
1.40
1.45
1.50
1.55
3
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
3
3
3
3
3
3
3
3
3
No Core
NOTES:
1. 0 = Processor pin connected to VSS.
2. 1 = Open on processor; may be pulled up to TTL VIH on baseboard.
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TM
3. To ensure a system is ready for the Intel Pentium III and Intel Celeron processors, the values in BOLD
in Table 2 should be supported.
Note that the ‘1111’ (all opens) ID can be used to detect the absence of a processor core in a given
socket as long as the power supply used does not affect these lines. Detection logic and pull-ups
should not affect VID inputs at the power source (see Section 7.0).
The VID pins should be pulled up to a TTL-compatible level with external resistors to the power
source of the regulator only if required by the regulator or external logic monitoring the VID[3:0]
signals. The power source chosen must be guaranteed to be stable whenever the supply to the
voltage regulator is stable. This will prevent the possibility of the processor supply going above the
specified VCCCORE in the event of a failure in the supply for the VID lines. In the case of a DC-to-
DC converter, this can be accomplished by using the input voltage to the converter for the VID line
pull-ups. A resistor of greater than or equal to 10 kΩ may be used to connect the VID signals to the
converter input. Note that no changes have been made to the physical connector or pin definitions
between the Intel-enabled VRM 8.2 and VRM 8.4 specifications. Intel requires that designs
utilize VRM 8.4 specifications to meet the Pentium III processor requirements.
18
Datasheet
INTEL [ INTEL ]
