Signal Description
2.19.1
PCI Express* Errors
PCI Express* errors are classified as either correctable errors or uncorrectable errors. Correctable
errors are those where hardware exists to correct the errors. Uncorrectable errors are errors where
hardware does not exist to correct the errors. Uncorrectable errors are further classified into fatal
and non-fatal errors, with non-fatal errors indicating an unreliable link. PCI Express* supports
three different error messages to support these error classes – ERR_COR, ERR_UNC and
ERR_FATAL. Refer to the PCI Express* Base Specification Revision 1.0a for details of the various
PCI Express* errors and how they are signaled and escalated.
PCI Express* error logging specifies a set of advanced transaction logging registers as an added
capability.
2.19.2
PCI Errors
PCI and PCI-X protocol errors include several sources of error, such as address and data parity
errors, split completion errors, master aborts and target aborts. Some of these are fatal and some are
non-fatal. The PCI-X specification specifies a set of rules on how a bridge must behave on a variety
of error conditions that could happen on the bus. The Intel® 6700PXH 64-bit PCI Hub implements
those rules on the PCI bus along with the Intel® 6700PXH 64-bit PCI Hub-specific error logging
and routing control to aid the system software/driver in error recovery and debug
2.19.2.1
Error Types
PCI errors are classified into two categories, those that are considered fatal and those that are
considered non-fatal. Fatal errors are those that have the potential to cause data corruption and
hence software must be careful to contain and escalate these errors (if needed). Non-fatal errors are
those errors that do not cause any data corruption, and include driver errors such as master aborts
on the PCI bus and target errors such as target abort. All errors on the PCI bus are uncorrectable
and will be forwarded to the PCI Express* bus as such.
The non-fatal class of errors is:
• Target Aborts on the PCI bus
• Master Aborts on the PCI bus
The fatal class of errors is:
• Data parity errors on the PCI bus
• Address and attribute parity errors on the PCI bus
2.19.2.2
Error Logging
The Intel® 6700PXH 64-bit PCI Hub provides error logging which may be used for system debug
and/or recovery. This logic logs the first fatal error that occurs, as well as subsequent fatal errors.
The log of the first error includes a status bit and transaction information, whereas the log of the
next error carries only status information. This first/next error mechanism applies only to the fatal
error class. Once the first fatal error is detected, it is logged using a status bit and a set of
transaction-log registers. All subsequent errors are logged using a next-error bit, until the first error
is cleared. Additionally, if a non-fatal error occurs on the PCI bus, and is followed later by a fatal
error on that same PCI bus, the fatal error overrides the non-fatal error, i.e. the transaction log
Intel® 6700PXH 64-bit PCI Hub Datasheet
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INTEL [ INTEL ]
