3 Register Description
The Intel® 6700PXH 64-bit PCI Hub contains registers for its PCI Express* to PCI bridge(s),
Standard Hot Plug Controller, I/OxAPIC controllers, and SMBus interfaces. This chapter describes
these registers. A detailed bit description is also provided.
There are four functions as seen from PCI Express—two I/OxAPIC functions and two PCI bridge
functions (one PCI bridge function for the Intel® 6702PXH 64-bit PCI Hub). All of the functions
have the same device number of 0, but with different function numbers.
3.1
PCI Configuration Registers
The PCI Express* interface is the logical primary bus and for the Intel® 6702PXH 64-bit PCI Hub
the PCI bus segment is a secondary bus with a PCI Express-to-PCI bridge corresponding to
Function 0. For the Intel® 6700PXH 64-bit PCI Hub, both PCI bus segments are separate
secondary buses with PCI Express-to-PCI bridges corresponding to Functions 0 and 2. The
Standard Hot -Plug Controller (SHPC) associated with each PCI bus segment appears as a
capability of the PCI Express-to-PCI Bridge. The I/OxAPIC controllers reside as separate PCI
functions (Function 1 for the Intel® 6702PXH 64-bit PCI Hub, Functions 1 and 3 for the Intel®
6700PXH 64-bit PCI Hub).
• PCI Express*-to-PCI Bridge (F0, F2). This portion of the Intel® 6700PXH 64-bit PCI Hub
implements the buffering and control logic between the PCI and the PCI Express* buses. The
PCI bus arbitration is handled by these PCI devices. The PCI decoder in this device must
decode the ranges for PCI Express* to the MCH. This register set also provides support for
Reliability, Availability, and Serviceability (RAS). Function 0 is intended for the PCI Express*
to PCI A Bridge and function 2 is intended for PCI Express* to PCI B Bridge (Intel®
6700PXH 64-bit PCI Hub only).
• I/OxAPIC Devices (F1, F3). The Intel® 6700PXH 64-bit PCI Hub implements a variation of
the APIC known as the I/OxAPIC. There are two I/OxAPIC devices on the Intel® 6700PXH
64-bit PCI Hub, and one on the Intel® 6702PXH 64-bit PCI Hub. They reside on the primary
bus. Function 1 is intended to be used with interrupts from PCI Bus A and Function 3 is
intended to be used with interrupts from PCI Bus B (Intel® 6700PXH 64-bit PCI Hub only).
• Standard Hot Plug Controller. There are two Standard Hot Plug controllers in the Intel®
6700PXH 64-bit PCI Hub, one for PCI Bus A and one for PCI Bus B. The Intel® 6702PXH
64-bit PCI Hub supports a single SHPC controller. These Standard Hot Plug Controllers
appear as a capability of its associated PCI Express-to-PCI Bridge.
Intel® 6700PXH 64-bit PCI Hub Datasheet
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