Signal Description
2.11.2.2
PCI-X Transactions
Table 2-18 lists the transactions supported by the Intel® 6700PXH 64-bit PCI Hub when the PCI
Interface is in PCI-X mode.
Table 2-18. PCI-X Transactions Supported
Intel® 6700PXH
64-bit PCI Hub As
Intel® 6700PXH
64-bit PCI Hub As
Type of Transaction
Type of Transaction
Master
Target
Master
Target
0000
Interrupt
acknowledge
No
No
1000
Alias to Memory
Read Block
No
Yes
0001
Special cycle
Yes
No
1001
Alias to Memory
Write Block
No
Yes
0010
0011
0100
0101
0110
I/O read
I/O write
Reserved
Reserved
Yes
Yes
No
No
No
No
No
Yes
1010
1011
1100
1101
1110
Configuration Read
Configuration Write
Split Completion
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
No
Dual Address Cycle
Memory Read
DWord
Yes
Memory Read
Block
0111
Memory Write
Yes
Yes
1111
Memory Write
Block
Yes
Yes
2.11.3
Read Transactions
2.11.3.1
Prefetchable
Any memory read line or memory read multiple commands on the PCI bus that are decoded by the
Intel® 6700PXH 64-bit PCI Hub are prefetched on the PCI Express* interface. The amount of data
prefetched depends on the clock frequency, PxREQ64#, and command type. The Intel® 6700PXH
64-bit PCI Hub does not prefetch past a 4-Kbyte page boundary.
2.11.3.2
2.11.3.3
Delayed
All memory read transactions are delayed read transactions. When the Intel® 6700PXH 64-bit PCI
Hub accepts a delayed read request, it samples the address, command, and address parity. This
information is entered into the delayed transaction queue. When in PCI-X mode, transactions
follow the split transaction model of PCI-X. Read data returned from PCI Express* for an active
delayed transaction entry is forwarded to the PCI-X master as a split completion.
Internal CSR Space
Memory reads to internal CSR space are handled with an immediate completion on the PCI bus (in
both PCI and PCI-X modes). The Intel® 6700PXH 64-bit PCI Hub never asserts PxACK64# for
memory transactions to CSR space and hence CSR reads are 32-bit transactions. Reads to CSR
memory bypass the normal inbound queues towards PCI Express* and complete on the PCI bus
within 16 PCI clocks. The Intel® 6700PXH 64-bit PCI Hub disconnects CSR memory reads after
Intel® 6700PXH 64-bit PCI Hub Datasheet
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