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6700PXH 参数 Datasheet PDF下载

6700PXH图片预览
型号: 6700PXH
PDF下载: 下载PDF文件 查看货源
内容描述: 64位PCI中枢 [64-bit PCI Hub]
分类和应用: PC
文件页数/大小: 194 页 / 2283 K
品牌: INTEL [ INTEL ]
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Signal Description  
Table 2-16. PCI-X Initialization Pattern Driven by the Intel® 6700PXH 64-bit PCI Hub  
(Sheet 2 of 2)  
Clock Period  
Clock Freq  
(MHz)  
PxPERR#  
PxDEVSEL#  
PxSTOP#  
PxTRDY#  
Mode  
(ns)  
Deasserted  
Deasserted  
Deasserted  
Asserted  
Asserted  
Asserted  
Deasserted  
Asserted  
Asserted  
Asserted  
PCI-X Mode 1 Reserved1  
Deasserted PCI-X Mode 1 Reserved1  
Asserted  
PCI-X Mode 1 Reserved1  
NOTE: The Intel® 6700PXH 64-bit PCI Hub never drives these patterns on the rising edge of PxPCIRST#  
signal; however, these patterns may appear before the signals settle to a steady value at the rising edge  
of PxPCIRST#.  
2.11.2  
Transaction Types  
2.11.2.1  
PCI Transactions  
Table 2-17 lists the PCI transactions supported by the Intel® 6700PXH 64-bit PCI Hub. As a PCI  
master, the Intel® 6700PXH 64-bit PCI Hub has full access to the 64-bit address space and can  
generate dual address cycles (DAC). As a target, the Intel® 6700PXH 64-bit PCI Hub can accept  
dual address cycles up to the full 64-bit address space. The Intel® 6700PXH 64-bit PCI Hub  
supports linear increment address mode only for bursting memory transfers (indicated when the  
low 2 address bits are equal to 0). If either of these address bits is nonzero, the Intel® 6700PXH  
64-bit PCI Hub disconnects the transaction after the first data transfer.  
The Intel® 6700PXH 64-bit PCI Hub decodes all PCI cycles in medium PxDEVSEL# timing.  
Table 2-17. Intel® 6700PXH 64-bit PCI Hub PCI Transactions  
Intel® 6700PXH  
64-bit PCI Hub As  
Intel® 6700PXH  
64-bit PCI Hub As  
Type of Transaction  
Type of Transaction  
Master  
Target  
Master  
Target  
0000  
Interrupt  
No  
No  
1000  
Reserved1  
No  
No  
acknowledge  
0001  
0010  
0011  
0100  
Special cycle  
I/O read  
Yes  
Yes  
Yes  
No  
No  
No  
No  
No  
1001  
1010  
1011  
1100  
Reserved1  
No  
Yes  
Yes  
No  
No  
No  
Configuration Read  
Configuration Write  
I/O write  
No  
Reserved1  
Memory Read  
Multiple  
Yes  
0101  
0110  
0111  
Reserved1  
Memory read  
Memory write  
No  
Yes  
Yes  
No  
Yes  
Yes  
1101  
1110  
1111  
Dual Address Cycle  
Memory Read Line  
Yes  
No  
No  
Yes  
Yes  
Yes  
Memory Write and  
Invalidate  
NOTES:  
1. The Intel® 6700PXH 64-bit PCI Hub never initiates a PCI transaction with a reserved command code and  
ignores reserved command codes as a target.  
38  
Intel® 6700PXH 64-bit PCI Hub Datasheet  
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