Register Description
3.7.1.1
Offset 00h: SHPC_BASEOFF—SHPC Base Offset Register
Offset:
Default Value: 00000000h
00–03h
Attribute: RO
Size: 32 bits
This register is used by software and/or BIOS (in conjunction with the SHPC Base Address
Register, SHPC_BAR) to determine the memory base address of the SHPC Working Register set.
This register must be accessed initially via Configuration Space.
Bits
31:0
Type
Reset
Description
RO
0
SHPC Base Offset (SHPCBO): This field contains the byte offset that must
be added to the 64-bit Base Address register SHPC_BAR in the Intel®
6700PXH 64-bit PCI Hub’s configuration space to access the SHPC Working
Register set using memory-mapped accesses. The Intel® 6700PXH 64-bit
PCI Hub has the working register set starting at offset 0.
3.7.1.2
Offset 0Ch: SLOT_CONFIG—Slot Configuration Register
Offset:
Default Value: 00000000h
0C–0Fh
Attribute: RWO, RO
Size: 32 bits
This register describes the configuration of the slots controlled by the SHPC.
Bits
Type
Reset
Description
31
RWO
0
Attention Button Implemented (ABI): This bit specifies whether the hot plug
slots controlled by this SHPC implement the optional Attention Button. If this
bit is set, Attention Buttons are implemented on every PCI slot controlled by
this SHPC.
30
29
RWO
RWO
0
0
MRL Sensor Implemented (MRLSI): This bit specifies whether MRL Sensors
are implemented on the hot plug slots controlled by the SHPC. If this bit is set,
the platform provides an MRL Sensor for each slot controlled by this SHPC.
Physical Slot Number Up/Down (PSNUD): This bit specifies the direction of
enumeration of external slot labels, beginning with the value in the Physical
Slot Number field (PSN) of this register (offset 0C-0Fh, bits 26:6). If this bit is
set, each external slot label increments by 1 from the value in the Physical
Slot Number field. If this bit is cleared, each external slot label decrements by
1 from the value in the Physical Slot Number field.
28:27
26:16
RO
0
0
Reserved.
RWO
Physical Slot Number (PSN): This field specifies the physical slot number of
the device addressed by the First Device Number (FDN) at bits 12:8 of this
register. This field must be hardware initialized to a value that assigns all slots
(controlled by this SHPC) a slot number that is globally unique within the
chassis.
15:13
12:8
RO
0
0
Reserved.
RWO
First Device Number (FDN): This field contains the device number assigned
to the first hot plug slot on this bus segment.
7:5
4:0
RO
0
0
Reserved.
RWO
Number of Slots Implemented (NSI): This field contains the number of hot
plug slots connected to the SHPC (that is, the number of slots controlled by
the SHPC). This field must not return a value of 0. (If the controller does not
control any slots in the system, the SHPC Capabilities List Item must not
appear in the Capabilities List).
130
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
