Register Description
3.6.2.5
Offset 314h: PWR_BUDREG0 – Power Budgeting
Register 0 (D0:F0, F2)
Offset:
Default Value: 00000000h
314 – 317h
Attribute: RO, RW
Size: 32 bits
This register reports various power consumption values in various power states.
Bits
Type
Reset
Description
31:21
20:0
RO
0
0
Reserved.
RW
Power Budgeting Register 0 (PWRBUDREG0): Software can program this
field to report various power consumption values in various power states.
Refer to the PCI Express* Base Specification Revision 1.0a for the format of
this field for reporting the various power consumption values.
3.6.2.6
Offset 318h, 320h,...374hh: PWR_BUDREG1 —
PWR_BUDREG23 Register (D0:F0, F2)
Offset:
Default Value: 00000000h
318h – 31Bh, 320h – 32Bh, etc. Attribute: RO, RW
Size: 32 bits
Power Budgeting Registers 1 through 23 are the same as the Power Budgeting Register 0 above.
Offset
Register
Description
318h–31Bh
31Ch–31Fh
320h–323h
324h–327h
328h–32Bh
32Ch–32Fh
330h–333h
334h–337h
338h–33Bh
33Ch–33Fh
340h–343h
344h–347h
348h–34Bh
34Ch–34Fh
350h–353h
354h–357h
358h–35Bh
35Ch–35Fh
360h–363h
364h–367h
368h–36Bh
Power Budgeting Register 1
Power Budgeting Register 2
Power Budgeting Register 3
Power Budgeting Register 4
Power Budgeting Register 5
Power Budgeting Register 6
Power Budgeting Register 7
Power Budgeting Register 8
Power Budgeting Register 9
Power Budgeting Register 10
Power Budgeting Register 11
Power Budgeting Register 12
Power Budgeting Register 13
Power Budgeting Register 14
Power Budgeting Register 15
Power Budgeting Register 16
Power Budgeting Register 17
Power Budgeting Register 18
Power Budgeting Register 19
Power Budgeting Register 20
Power Budgeting Register 21
Same as Power Budgeting Register 0
(PWRBUDREG0), offset 314h.
128
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
