Switching Characteristics
Page 27
Table 26 shows the approximate maximum data rate using the 10G PCS.
(1)
Table 26. Stratix V 10G PCS Approximate Maximum Data Rate
PMA Width
PCS Width
64
64
40
40
50
40
40
32
32
32
Transceiver
Speed Grade
(2)
Mode
66/67
64/66/67
C1, C2, C2L, I2, I2L
core speed grade
1
2
14.1
12.5
12.5
14.1
12.5
12.5
10.69
10.69
10.69
14.1
12.5
12.5
13.6
12.5
13.6
12.5
C1, C2, C2L, I2, I2L
core speed grade
C3, I3, I3L
core speed grade
10.88
10.88
FIFO or
Register
C1, C2, C2L, I2, I2L
core speed grade
C3, I3, I3L
core speed grade
8.5 Gbps
3
C4, I4
core speed grade
I3YY
core speed grade
10.3125 Gbps
Notes to Table 26:
(1) The maximum data rate is in Gbps.
(2) The Phase Compensation FIFO can be configured in FIFO mode or register mode. In the FIFO mode, the pointers are not fixed, and the latency
can vary. In the register mode the pointers are fixed for low latency.
December 2015 Altera Corporation
Stratix V Device Datasheet
INTEL [ INTEL ]
