CV-51002
2015.12.04
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PLL Specifications
PLL Specifications
Table 30: PLL Specifications for Cyclone V Devices
This table lists the Cyclone V PLL block specifications. Cyclone V PLL block does not include HPS PLL.
Symbol
Parameter
Condition
Min
Typ
—
Max
Unit
–C6 speed grade
5
670(52)
622(52)
MHz
MHz
–C7, –I7 speed
grades
5
—
fIN
Input clock frequency
–C8, –A7 speed
grades
5
5
—
—
—
—
—
—
—
—
500(52)
325
MHz
MHz
MHz
MHz
MHz
%
fINPFD
Integer input clock frequency to the
phase frequency detector (PFD)
—
fFINPFD
Fractional input clock frequency to the
PFD
—
50
600
600
40
—
—
160
–C6, –C7, –I7 speed
grades
1600
1300
60
PLL voltage-controlled oscillator
(VCO) operating range
(53)
fVCO
–C8, –A7 speed
grades
tEINDUTY
Input clock or external feedback clock
input duty cycle
—
–C6, –C7, –I7 speed
grades
550(54)
460(54)
MHz
MHz
Output frequency for internal global or
regional clock
fOUT
–C8, –A7 speed
grades
(52)
(53)
(54)
This specification is limited in the Quartus Prime software by the I/O maximum frequency. The maximum I/O frequency is different for each I/O
standard.
The VCO frequency reported by the Quartus Prime software takes into consideration the VCO post-scale counter K value. Therefore, if the counter K
has a value of 2, the frequency reported can be lower than the fVCO specification.
This specification is limited by the lower of the two: I/O fMAX or FOUT of the PLL.
Cyclone V Device Datasheet
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