Processor Configuration Registers
2.5.30
REMAPLIMIT—Remap Limit Address Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/PCI
98–9Fh
0000000000000000h
RW-L, RW-KL
64 bits
Size:
BIOS Optimal Default
000000000000h
Reset
Value
RST/
PWR
Bit
Access
RO
Description
63:36
35:20
19:1
0h
0000h
0h
Reserved (RSVD)
Remap Lim Remap Base register, the Remap window is disabled.
These Bits are Intel TXT lockable.
RW-L
RO
Uncore
Uncore
Reserved (RSVD)
Lock (LOCK)
0
RW-KL
0b
This bit will lock all writeable settings in this register, including
itself.
2.5.31
TOM—Top of Memory Register
This Register contains the size of physical memory. BIOS determines the memory size
reported to the OS using this Register.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/PCI
A0–A7h
0000007FFFF00000h
RW-L, RW-KL
64 bits
Size:
BIOS Optimal Default
00000000000h
Reset
Value
RST/
PWR
Bit
Access
Description
63:39
RO
0h
Reserved (RSVD)
Top of Memory (TOM)
This register reflects the total amount of populated physical
memory. This is NOT necessarily the highest main memory
address (holes may exist in main memory address map due to
addresses allocated for memory mapped IO). These bits
correspond to address bits 38:20 (1 MB granularity). Bits 19:0
are assumed to be 0. All the bits in this register are locked in
Intel TXT mode.
38:20
RW-L
7FFFFh
Uncore
Uncore
19:1
0
RO
0h
0b
Reserved (RSVD)
Lock (LOCK)
RW-KL
This bit will lock all writeable settings in this register, including
itself.
Datasheet, Volume 2
77
INTEL [ INTEL ]
