Processor Configuration Registers
2.5.29
REMAPBASE—Remap Base Address Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/PCI
90–97h
0000000FFFF00000h
RW-L, RW-KL
64 bits
Size:
BIOS Optimal Default
000000000000h
Reset
Value
RST/
PWR
Bit
Access
Description
63:36
RO
0h
Reserved (RSVD)
Remap Base Address (REMAPBASE)
The value in this register defines the lower boundary of the
Remap window. The Remap window is inclusive of this address.
In the decoder A[19:0] of the Remap Base Address are assumed
to be 0s. Thus the bottom of the defined memory range will be
aligned to a 1 MB boundary.
35:20
RW-L
FFFFh
Uncore
When the value in this register is greater than the value
programmed into the Remap Limit register, the Remap window is
disabled.
These bits are Intel TXT lockable.
19:1
0
RO
0h
0b
Reserved (RSVD)
Lock (LOCK)
RW-KL
Uncore
This bit will lock all writeable settings in this register, including
itself.
76
Datasheet, Volume 2
INTEL [ INTEL ]
