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326769-002 参数 Datasheet PDF下载

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型号: 326769-002
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内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
2.18.29 IOTLB_REG—IOTLB Invalidate Register  
This register invalidates IOTLB. The act of writing the upper byte of the IOTLB_REG  
with IVT field set causes the hardware to perform the IOTLB invalidation.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/GFXVTBAR  
108–10Fh  
0200000000000000h  
RO-V, RW, RW-V  
64 bits  
Size:  
BIOS Optimal Default  
0000000000000h  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
Invalidate IOTLB (IVT)  
Software requests IOTLB invalidation by setting this field.  
Software must also set the requested invalidation granularity by  
programming the IIRG field.  
Hardware clears the IVT field to indicate the invalidation request  
is complete. Hardware also indicates the granularity at which the  
invalidation operation was performed through the IAIG field.  
Software must not submit another invalidation request through  
this register while the IVT field is set, nor update the associated  
Invalidate Address register.  
63  
RW-V  
0h  
Uncore  
Software must not submit IOTLB invalidation requests when  
there is a context-cache invalidation request pending at this  
remapping hardware unit.  
Hardware implementations reporting write-buffer flushing  
requirement (RWBF=1 in Capability register) must implicitly  
perform a write buffer flushing before invalidating the IOTLB.  
62:62  
RO  
0h  
Reserved (RSVD)  
IOTLB Invalidation Request Granularity (IIRG)  
When requesting hardware to invalidate the IOTLB (by setting  
the IVT field), software writes the requested invalidation  
granularity through this field. The following are the encodings for  
the field.  
00 = Reserved.  
01 = Global invalidation request.  
10 = Domain-selective invalidation request. The target domain-  
id must be specified in the DID field.  
11 = Page-selective invalidation request. The target address,  
mask and invalidation hint must be specified in the  
Invalidate Address register, and the domain-id must be  
provided in the DID field.  
61:60  
RW  
0h  
Uncore  
Hardware implementations may process an invalidation request  
by performing invalidation at a coarser granularity than  
requested. Hardware indicates completion of the invalidation  
request by clearing the IVT field. At this time, the granularity at  
which actual invalidation was performed is reported through the  
IAIG field  
59:59  
RO  
0h  
Reserved (RSVD)  
Datasheet, Volume 2  
291