Processor Configuration Registers
2.18.32 VTPOLICY—DMA Remap Engine Policy Control Register
This register contains all the policy bits related to the DMA remap engine.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/GFXVTBAR
FF0–FF3h
00000000h
RW-L, RO, RO-KFW, RW-KL
32 bits
Size:
BIOS Optimal Default
0000h
Reset
Value
RST/
PWR
Bit
Access
Description
DMA Remap Engine Policy Lock-Down (DMAR_LCKDN)
This register bit protects all the DMA remap engine specific policy
configuration registers. Once this bit is set by software all the
DMA remap engine registers within the range F00h to FFCh will
be read-only. This bit can only be clear through platform reset.
31
RW-KL
RO
0b
0h
Uncore
30:0
Reserved (RSVD)
Datasheet, Volume 2
295
INTEL [ INTEL ]
