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326769-002 参数 Datasheet PDF下载

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型号: 326769-002
PDF下载: 下载PDF文件 查看货源
内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
2.12.9  
DMIVC1RCTL—DMI VC1 Resource Control Register  
This register controls the resources associated with PCI Express* Virtual Channel 1.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/DMIBAR  
20–23h  
01000000h  
RO, RW  
32 bits  
Size:  
BIOS Optimal Default  
00000h  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
Virtual Channel 1 Enable (VC1E)  
0 = Virtual Channel is disabled.  
1 = Virtual Channel is enabled. See exceptions below.  
Software must use the VC Negotiation Pending bit to check  
whether the VC negotiation is complete. When VC Negotiation  
Pending bit is cleared, a 1 read from this VC Enable bit indicates  
that the VC is enabled (Flow Control Initialization is completed for  
the PCI Express port). A 0 read from this bit indicates that the  
Virtual Channel is currently disabled.  
31  
RW  
0b  
Uncore  
BIOS Requirement:  
1.  
To enable a Virtual Channel, the VC Enable bits for that  
Virtual Channel must be set in both Components on a Link.  
To disable a Virtual Channel, the VC Enable bits for that  
Virtual Channel must be cleared in both Components on a  
Link.  
2.  
3.  
4.  
Software must ensure that no traffic is using a Virtual  
Channel at the time it is disabled.  
Software must fully disable a Virtual Channel in both  
Components on a Link before re-enabling the Virtual  
Channel.  
30:27  
26:24  
23:20  
RO  
RW  
RO  
0h  
001b  
0h  
Reserved (RSVD)  
Virtual Channel 1 ID (VC1ID)  
Assigns a VC ID to the VC resource. Assigned value must be non-  
zero. This field cannot be modified when the VC is already  
enabled.  
Uncore  
Reserved (RSVD)  
Port Arbitration Select (PAS)  
Configures the VC resource to provide a particular Port  
Arbitration service. Valid value for this field is a number  
corresponding to one of the asserted bits in the Port Arbitration  
Capability field of the VC resource.  
19:17  
RW  
000b  
Uncore  
Uncore  
16:8  
7
RO  
RO  
0h  
0b  
Reserved (RSVD)  
Traffic Class m / Virtual Channel 1 (TCMVC1M)  
Traffic Class / Virtual Channel 1 Map (TCVC1M)  
This indicates the TCs (Traffic Classes) that are mapped to the VC  
resource. Bit locations within this field correspond to TC values.  
For example, when bit 6 is set in this field, TC6 is mapped to this  
VC resource. When more than one bit in this field is set, it  
indicates that multiple TCs are mapped to the VC resource. In  
order to remove one or more TCs from the TC/VC Map of an  
enabled VC, software must ensure that no new or outstanding  
transactions with the TC labels are targeted at the given Link.  
6:1  
RW  
RO  
00h  
Uncore  
Uncore  
BIOS Requirement: Program this field with the value 010001b,  
which maps TC1 and TC5 to VC1.  
Traffic Class 0 / Virtual Channel 1 Map (TC0VC1M)  
Traffic Class 0 is always routed to VC0.  
0
0b  
Datasheet, Volume 2  
223