Processor Configuration Registers
2.6.37
DSTS—Device Status Register
This register reflects status corresponding to controls in the Device Control register.
The error reporting bits are in reference to errors detected by this device, not errors
messages received across the link.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/PCI
AA–ABh
0000h
RW1C, RO
16 bits
000h
Size:
BIOS Optimal Default
Reset
Value
RST/
PWR
Bit
Access
Description
15:6
RO
0h
Reserved (RSVD)
Transactions Pending (TP)
0 = All pending transactions (including completions for any
outstanding non-posted requests on any used virtual
channel) have been completed.
1 = Indicates that the device has transaction(s) pending
(including completions for any outstanding non-posted
requests for all used Traffic Classes).
5
RO
0b
Uncore
Not Applicable or Implemented. Hardwired to 0.
4
3
RO
0h
0b
Reserved (RSVD)
Unsupported Request Detected (URD)
This bit indicates that the Function received an Unsupported
Request. Errors are logged in this register regardless of whether
error reporting is enabled or not in the Device Control register.
For a multi-Function device, each Function indicates status of
errors as perceived by the respective Function.
RW1C
Uncore
Uncore
Uncore
Uncore
Fatal Error Detected (FED)
This bit indicates status of Fatal errors detected. Errors are
logged in this register regardless of whether error reporting is
enabled or not in the Device Control register. For a multi-Function
device, each Function indicates status of errors as perceived by
the respective Function.
2
1
0
RW1C
RW1C
RW1C
0b
0b
0b
Non-Fatal Error Detected (NFED)
This bit indicates status of Nonfatal errors detected. Errors are
logged in this register regardless of whether error reporting is
enabled or not in the Device Control register. For a multi-Function
device, each Function indicates status of errors as perceived by
the respective Function.
Correctable Error Detected (CED)
This bit indicates status of correctable errors detected. Errors are
logged in this register regardless of whether error reporting is
enabled or not in the Device Control register. For a multi-Function
device, each Function indicates status of errors as perceived by
the respective Function.
Datasheet, Volume 2
113
INTEL [ INTEL ]
