Features
7.5.3.8
VTL: Core Voltage Tolerance, Low
This location contains the maximum Core Voltage Tolerance DC offset low. This field,
rounded to the next thousandth, is in mV and is reflected in binary coded decimal.
Writes to this register have no effect. A value of FF indicates that this value is
undetermined. Writes to this register have no effect.
Example: 50 mV tolerance would be saved as 50h.
Offset:
28h
Bit
Description
7:0
Core Voltage Tolerance, Low
00h-FFh: mV
7.5.3.9
PDCKS: Processor Core Data Checksum
This location provides the checksum of the Processor Core Data Section. Writes to this
register have no effect.
Offset:
29h
Bit
Description
7:0
Processor Core Data Checksum
One-byte checksum of the Processor Data Section
00h- FFh: See Section 7.5.10 for calculation of this value.
7.5.4
Processor Uncore Data
This section contains silicon-related data relevant to the processor Uncore.
7.5.4.1
MAXQPI: Maximum Intel QPI Transfer Rate
Systems may need to read this offset to decide if all installed processors support the
same Intel QPI Link Transfer Rate. The data provided is the transfer rate, rounded to a
whole number, and reflected in binary coded decimal. Writes to this register have no
effect.
Example: The Intel Xeon Processor E7-8800/4800/2800 Product Families processor
supports a maximum Intel QPI link transfer rate of 6.4 GT/s. Therefore, offset 2Ah-2Bh
has a value of 6400.
Offset:
2Ah-2Bh
Bit
Description
15:0
Maximum Intel QPI Transfer Rate
0000h-FFFFh: MHz
7.5.4.2
MINQPI: Minimum Operating Intel QPI Transfer Rate
Systems may need to read this offset to decide if all installed processors support the
same Intel QPI Link Transfer Rate. This does not relate to the “link power up” transfer
rate of 1/4th Ref Clk. The data provided is the transfer rate, rounded to a whole
number, and reflected in binary coded decimal. Writes to this register have no effect.
Datasheet Volume 1 of 2
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