Features
Offset:
Bit
15h
Description
7:2
1:0
Number of cores
Number of threads per core
7.5.2.4
SBS: System Bus Speed
This location contains the system bus frequency information. Systems may need to
read this offset to decide if all installed processors support the same system bus speed.
The data provided is the speed, rounded to a whole number, and reflected in binary
coded decimal. Writes to this register have no effect.
Example: A processor with system buss speed of 1.066GHz will have a value of 1066h.
Offset:
16h-17h
Bit
Description
15:0
System Bus Speed
0000h-FFFFh: MHz
7.5.2.5
RES2: Reserved 2
This location is reserved. Writes to this register have no effect.
Offset:
18h-19h
Bit
Description
15:0
RESERVED
0000h-FFFFh: Reserved
7.5.2.6
PDCKS: Processor Data Checksum
This location provides the checksum of the Processor Data Section. Writes to this
register have no effect.
Offset:
1Ah
Bit
Description
7:0
Processor Data Checksum
One-byte checksum of the Processor Data Section
00h- FFh: See Section 7.5.10 for calculation of this value.
7.5.3
Processor Core Data
This section contains silicon-related data relevant to the processor cores.
7.5.3.1
CPUID: CPUID
This location contains the CPUID, Processor Type, Family, Model and Stepping. The
CPUID field is a copy of the results in EAX[15:0] from Function 1 of the CPUID
instruction. Writes to this register have no effect. Data format is hexidecimal.
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Datasheet Volume 1 of 2
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