Features
Offset:
39h
Bit
Description
7:0
VIO Voltage Tolerance, High
00h-FFh: mV
7.5.4.9
VIOVTL: Voltage Tolerance, Low
Offset 3Ah contains the VIO voltage tolerance, low. This is the minimum voltage swing
under the required voltage allowed. This field, rounded to the next thousandth, is in mV
and is reflected in binary coded decimal. A value of FF indicates that this value is
undetermined. Writes to this register have no effect.
Example: A 50 mV tolerance would be saved as 50h.
Offset:
3Ah
Bit
Description
7:0
Core Voltage Tolerance, Low
00h-FFh: mV
7.5.4.10
RES4: Reserved 4
This location is reserved. Writes to this register have no effect.
Offset:
3Bh-3Eh
Bit
Description
31:0
RESERVED
00000000h-FFFFFFFFh: Reserved
7.5.4.11
7.5.4.12
L2SIZE: L2 Cache Size
This location contains the size of the level-two cache in kilobytes. Writes to this register
have no effect. Data format is decimal.
Example: The Intel Xeon Processor E7-8800/4800/2800 Product Families processor
has a 2.5 MB L2 cache. Thus, offset 3Fh-40h will contain a value of 0A00h.
L3SIZE: L3 Cache Size
Offset:
3Fh-40h
Bit
Description
15:0
L2 Cache Size
0000h-FFFFh: KB
This location contains the size of the level-three cache in kilobytes. Writes to this
register have no effect. Data format is decimal.
Example: The Intel Xeon Processor E7-8800/4800/2800 Product Families processor
has up to a 30 MB L3 cache. Thus, offset 41h-42h will contain a value of 8700h.
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Datasheet Volume 1 of 2