欢迎访问ic37.com |
会员登录 免费注册
发布采购

325119-001 参数 Datasheet PDF下载

325119-001图片预览
型号: 325119-001
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔® Xeon®处理器E7-8800 / 2800分之4800产品系列 [Intel® Xeon® Processor E7-8800/4800/2800 Product Families]
分类和应用:
文件页数/大小: 174 页 / 3951 K
品牌: INTEL [ INTEL ]
 浏览型号325119-001的Datasheet PDF文件第125页浏览型号325119-001的Datasheet PDF文件第126页浏览型号325119-001的Datasheet PDF文件第127页浏览型号325119-001的Datasheet PDF文件第128页浏览型号325119-001的Datasheet PDF文件第130页浏览型号325119-001的Datasheet PDF文件第131页浏览型号325119-001的Datasheet PDF文件第132页浏览型号325119-001的Datasheet PDF文件第133页  
Thermal Specifications  
Note that the 4-byte PCI configuration address and data defined above are sent in  
standard PECI ordering with LSB first and MSB last.  
6.3.2.5.2  
Supported Responses  
The typical client response is a passing FCS, a passing Completion Code and valid Data.  
Under some conditions, the client’s response will indicate a failure.  
Table 6-8.  
PCIConfigWr() Response Definition  
Response  
Bad FCS  
Meaning  
Electrical error or AW FCS failure  
Abort FCS  
CC: 0x40  
CC: 0x80  
Illegal command formatting (mismatched RL/WL/Command Code)  
Command passed, data is valid  
Error causing a response timeout. Either due to a rare, internal timing condition or a  
processor RESET condition or processor S1 state. Retry is appropriate outside of the RESET  
or S1 states.  
6.3.2.6  
Mailbox  
The PECI mailbox (“Mbx”) is a generic interface to access a wide variety of internal  
processor states. A Mailbox request consists of sending a 1-byte request type and  
4-byte data to the processor, followed by a 4-byte read of the response data. The  
following sections describe the Mailbox capabilities as well as the usage semantics for  
the MbxSend and MbxGet commands which are used to send and receive data.  
6.3.2.6.1  
Capabilities  
Table 6-9.  
Mailbox Command Summary (Sheet 1 of 2)  
Request  
MbxSend  
Data  
(dword)  
MbxGet  
Data  
(dword)  
Command  
Name  
Type  
Code  
(byte)  
Description  
Ping  
0x00  
0x01  
0x00  
0x00  
Verify the operability / existence of the Mailbox.  
Thermal  
Status  
Read/Clear  
Log bit clear Thermal  
mask  
Read the thermal status register and optionally clear any log bits.  
The thermal status has status and log bits indicating the state of  
processor TCC activation, external FORCEPR_N assertion, and  
Critical Temperature threshold crossings.  
Status  
Register  
Counter  
0x03  
0x00  
0x00  
0x00  
Snapshots all PECI-based counters  
Snapshot  
Counter Clear  
Counter Read  
0x04  
0x05  
0x00  
Concurrently clear and restart all counters.  
Counter  
Number  
Counter Data  
Returns the counter number requested.  
0: Total reference time  
1: Total TCC Activation time counter  
Icc-TDC Read  
0x06  
0x07  
0x00  
0x00  
Icc-TDC  
Returns the specified Icc-TDC of this part, in Amps.  
Reads the thermal averaging constant.  
Thermal Config  
Data Read  
Thermal  
config data  
Thermal Config  
Data Write  
0x08  
0x09  
0xB  
Thermal  
Config Data  
0x00  
Writes the thermal averaging constant.  
Tcontrol Read  
0x00  
0x00  
Tcontrol  
Reads the fan speed control reference temperature, Tcontrol, in  
PECI temperature format.  
T-state  
Throttling  
Control Read  
ACPI T-state  
Control Word  
Reads the PECI ACPI T-state throttling control word.  
Datasheet Volume 1 of 2  
129  
 复制成功!