Thermal Specifications
Figure 6-16. Thermal Status Word
6.3.2.6.4
Counter Snapshot / Read / Clear
A reference time and ‘Thermally Constrained’ time are managed in the processor. These
two counters are managed via the Mailbox. These counters are valuable for detecting
thermal runaway conditions where the TCC activation duty cycle reaches excessive
levels.
The counters may be simultaneously snapshot, simultaneously cleared, or
independently read. The simultaneous snapshot capability is provided in order to
guarantee concurrent reads even with significant read latency over the PECI bus. Each
counter is 32-bits wide.
Table 6-10. Counter Definition
Counter
Number
Counter Name
Definition
Total Time
0x00
0x01
Counts the total time the processor has been executing with a
resolution of approximately 1ms. This counter wraps at 32 bits.
Thermally Constrained Time
Counts the total time the processor has been operating at a
lowered performance due to TCC activation. This timer includes
the time required to ramp back up to the original P-state target
after TCC activation expires. This timer does not include TCC
activation time as a result of an external assertion of
FORCEPR_N.
6.3.2.6.5
6.3.2.6.6
Icc-TDC Read
Icc-TDC is the Intel Xeon Processor E7-8800/4800/2800 Product Families processor
TDC current draw specification. This data may be used to confirm matching Icc profiles
of processors in MP configurations. It may also be used during the processor boot
sequence to verify processor compatibility with motherboard Icc delivery capabilities.
This command returns Icc-TDC in units of 1 Amp.
Thermal Data Config Read / Write
The Thermal Data Configuration register allows the PECI host to control the window
over which thermal data is filtered. The default window is 256 ms. The host may
configure this window by writing a Thermal Filtering Constant as a power of two.
E.g., sending a value of 9 results in a filtering window of 29 or 512 ms.
Datasheet Volume 1 of 2
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