Gigabit LAN Configuration Registers
12.1.25 MADDL—Message Address Low Register
(Gigabit LAN—D25:F0)
Address Offset: D4h–D7h
Attribute:
Size:
R/W
32 bits
Default Value:
See bit description
Bit
Description
Message Address Low (MADDL) — R/W. Written by the system to indicate the lower
32 bits of the address to use for the MSI memory write transaction. The lower two bits
will always return 0 regardless of the write operation.
31:0
12.1.26 MADDH—Message Address High Register
(Gigabit LAN—D25:F0)
Address Offset: D8h–DBh
Attribute:
Size:
R/W
32 bits
Default Value:
See bit description
Bit
Description
Message Address High (MADDH) — R/W. Written by the system to indicate the
upper 32 bits of the address to use for the MSI memory write transaction.
31:0
12.1.27 MDAT—Message Data Register
(Gigabit LAN—D25:F0)
Address Offset: DCh–DDh
Attribute:
Size:
R/W
16 bits
Default Value:
See bit description
Bit
Description
Message Data (MDAT) — R/W. Written by the system to indicate the lower 16 bits of
the data written in the MSI memory write DWord transaction. The upper 16 bits of the
transaction are written as 0000h.
31:0
12.1.28 FLRCAP—Function Level Reset Capability
(Gigabit LAN—D25:F0)
Address Offset: E0h–E1h
Attribute:
Size:
RO
16 bits
Default Value:
0009h
Bit
Description
Next Pointer — RO. This field provides an offset to the next capability item in the
capability list. The value of 00h indicates the last item in the list.
15:8
7:0
Capability ID — RO. The value of this field depends on the FLRCSSEL bit.
13h = If FLRCSSEL = 0
09h = If FLRCSSEL = 1, indicating vendor specific capability.
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Datasheet
INTEL [ INTEL ]
