Functional Description
5.23.1
SPI Supported Feature Overview
SPI Flash on the ICH10 has two operational modes, descriptor and non-descriptor.
5.23.1.1
Non-Descriptor Mode
Non-descriptor mode is similar to the flash functionality of ICH7. In this mode, SPI
Flash can only be used for BIOS. Direct read and writes are not supported. BIOS has
read/write access only through register accesses. Through those register accesses
BIOS can read and write to the entire flash without security checking. There is also no
support for the integrated Gigabit Ethernet, Intel Management Engine, chipset soft
straps, as well multiple SPI Flash components.
5.23.1.2
Descriptor Mode
Descriptor Mode enables many new features of the chipset:
• Integrated Gigabit Ethernet and Host processor for Gigabit Ethernet Software
• Intel Active Management Technology
• Intel Quiet System Technology
• Supports two SPI Flash components using two separate chip select pins
• Hardware enforced security restricting master accesses to different regions
• Chipset Soft Strap region provides the ability to use Flash NVM as an alternative to
hardware pull-up/pull-down resistors for both ICH and (G)MCH
• Supports the SPI Fast Read instruction and frequencies of 33 MHz
• Uses standardized Flash Instruction Set
5.23.1.2.1
SPI Flash Regions
In Descriptor Mode the Flash is divided into five separate regions:
Region
Content
0
1
Flash Descriptor
BIOS
Intel Management
Engine
2
3
4
Gigabit Ethernet
Platform Data
Only three masters can access the four regions: Host processor running BIOS code,
Integrated Gigabit Ethernet and Host processor running Gigabit Ethernet Software, and
Intel Management Engine. The only required region is Region 0, the Flash Descriptor.
Region 0 must be located in the first sector of device 0 (offset 0).
Flash Region Sizes
SPI flash space requirements differ by platform and configuration. The Flash Descriptor
requires one 4 KB or larger block. GbE requires two 4 KB or larger blocks. The Platform
Data Region is 32 KB. The amount of flash space consumed is dependent on the erase
granularity of the flash part and the platform requirements for the Intel ME and BIOS
regions. The Intel ME region will contain firmware to support Intel Quiet System
Technology, Intel Active Management Technology, ASF 2.0 and Intel Trusted Platform
Module.
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Datasheet
INTEL [ INTEL ]
