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319973-003 参数 Datasheet PDF下载

319973-003图片预览
型号: 319973-003
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔I / O控制器中枢10 [Intel I/O Controller Hub 10]
分类和应用: 控制器
文件页数/大小: 840 页 / 5889 K
品牌: INTEL [ INTEL ]
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Functional Description  
Using a GPI to Clear CMOS  
A jumper on a GPI can also be used to clear CMOS values. BIOS would detect the  
setting of this GPI on system boot-up, and manually clear the CMOS array.  
Note:  
The GPI strap technique to clear CMOS requires multiple steps to implement. The  
system is booted with the jumper in new position, then powered back down. The  
jumper is replaced back to the normal position, then the system is rebooted again.  
Warning:  
Do not implement a jumper on VccRTC to clear CMOS.  
5.12  
Processor Interface (D31:F0)  
The ICH10 interfaces to the processor with a variety of signals  
• Standard Outputs to processor: A20M#, SMI#, NMI, INIT#, INTR, STPCLK#,  
IGNNE#, CPUPWRGD, DPSLP#  
• Standard Input from processor: FERR#, THRMTRIP#  
Most ICH10 outputs to the processor use standard buffers. The ICH10 has separate  
V_CPU_IO signals that are pulled up at the system level to the processor voltage, and  
thus determines VOH for the outputs to the processor.  
5.12.1  
Processor Interface Signals  
This section describes each of the signals that interface between the ICH10 and the  
processor(s). Note that the behavior of some signals may vary during processor reset,  
as the signals are used for frequency strapping.  
5.12.1.1  
A20M# (Mask A20)  
The A20M# signal is active (low) when both of the following conditions are true:  
• The ALT_A20_GATE bit (Bit 1 of PORT92 register) is a 0  
• The A20GATE input signal is a 0  
The A20GATE input signal is expected to be generated by the external microcontroller  
(KBC).  
138  
Datasheet  
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