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319973-003 参数 Datasheet PDF下载

319973-003图片预览
型号: 319973-003
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔I / O控制器中枢10 [Intel I/O Controller Hub 10]
分类和应用: 控制器
文件页数/大小: 840 页 / 5889 K
品牌: INTEL [ INTEL ]
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Functional Description  
5.3.4  
PCI Power Management  
The LAN Controller supports the Advanced Configuration and Power Interface (ACPI)  
specification as well as Advanced Power Management (APM). This allows the host to be  
awoken (i.e., from Sx (S3-S5) to S0) by network-related activity via an internal host  
wake signal.  
The LAN controller contains power management registers for PCI, and supports D0 and  
D3 states. PCI transactions are only allowed in the D0 state, except for host accesses  
to the LAN controller’s PCI configuration registers.  
5.3.4.1  
Wake-Up  
The LAN Controller supports two types of wakeup mechanisms:  
1. Advanced Power Management (APM) Wakeup  
2. ACPI Power Management Wakeup  
Both mechanisms use an internal WAKE# signal to wake the system up. This signal is  
connected to the suspend wake logic in the ICH10. The wake-up steps are as follows:  
1. Host Wake Event occurs (note that packet is not delivered to host)  
2. PME_STATUS bit is set  
3. Internal WAKE# signal asserted by Host LAN function  
4. System wakes from Sx state to S0 state  
5. The Host LAN function is transitioned to D0  
6. The Host clears the PME_STATUS bit  
7. Internal WAKE# signal is deasserted by Host LAN function  
5.3.4.1.1  
Advanced Power Management Wakeup  
Advanced Power Management Wakeup, or APM Wakeup, was previously known as Wake  
on LAN. It is a feature that has existed in the 10/100 Mbps NICs for several  
generations. The basic premise is to receive a broadcast or unicast packet with an  
explicit data pattern, and then to assert a signal to wake-up the system. In the earlier  
generations, this was accomplished by using a special signal that ran across a cable to  
a defined connector on the motherboard. The NIC would assert the signal for  
approximately 50ms to signal a wakeup. The LAN Controller uses (if configured to) an  
in-band PM_PME message for this.  
On power-up, the LAN Controller will read the APM Enable bits from the NVM PCI Init  
Control Word into the APM Enable (APME) bits of the Wakeup Control Register (WUC).  
These bits control enabling of APM Wakeup.  
When APM Wakeup is enabled, the LAN Controller checks all incoming packets for Magic  
Packets.  
Once the LAN Controller receives a matching magic packet, it will:  
• Set the Magic Packet Received bit in the Wake Up Status Register (WUS).  
• Set the PME_Status bit in the Power Management Control / Status Register  
(PMCSR) and assert the internal WAKE# signal.  
APM Wakeup is supported in all power states and only disabled if a subsequent NVM  
read results in the APM Wake Up bit being cleared or the software explicitly writes a 0  
to the APM Wake Up (APM) bit of the WUC register.  
104  
Datasheet  
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