General Chipset Configuration
6.1.1
RCTCL—Root Complex Topology Capabilities List
Address Offset:
Default Value:
0000h
00010005h
Attribute:
Size:
RO
32 bits
Default
and
Bits
Description
Access
000h
RO
31:20
19:16
15:0
Next Capability (NEXT): This field indicates next item in the list.
1h
RO
Capability Version (CV): This field indicates the version of the capability
structure.
0005h
RO
Capability ID (CID): This field indicates this is a PCI Express link
capability section of an RCRB.
6.1.2
ESD—Element Self Description
Address Offset:
Default Value:
0004h
00000102h
Attribute:
Size:
RO, R/WO
32 bits
Default
Bits
and
Description
Access
00h
RO
Port Number (PN): A value of 0 to indicate the egress port for Intel®
SCH.
31:24
23:16
Component ID (CID): This field indicates the component ID assigned to
this element by software. This is written once by platform BIOS and is
locked until a platform reset.
00h
R/WO
01h
RO
Number of Link Entries (NLE): This field indicates that one link entry
(corresponding to Intel® HD Audio) is described by this RCRB.
15:08
7:4
0
RO
Reserved
2h
RO
Element Type (ET): This field indicates that the element type is a root
complex internal link.
3:0
72
Datasheet