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319537-003US 参数 Datasheet PDF下载

319537-003US图片预览
型号: 319537-003US
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔系统控制器中心 [Intel System Controller Hub]
分类和应用: 控制器
文件页数/大小: 450 页 / 2593 K
品牌: INTEL [ INTEL ]
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General Chipset Configuration  
6.2  
Interrupt Pin and Routing Configuration  
Configuration of interrupts involves setting both the interrupt pin that a particular  
device/function should be mapped to, as well as the routing of that pin to the  
appropriate PIRQx signal that ultimately goes to either the PIC or APIC controller.  
6.2.1  
Interrupt Pin Configuration  
The following registers tell each device which interrupt pin to report in the IPIN register  
of their configuration space. Each register has one or more 4-bit field assigned to a  
particular PCI function. This 4-bit field is defined as shown in Table 15.  
Table 15.  
Interrupt Pin Field Bit Decoding  
Bits  
Pin  
0h  
1h  
No Interrupt  
INTA#  
2h  
INTB#  
3h  
INTC#  
4h  
INTD#  
5h – Fh  
Reserved  
Table 16.  
Interrupt Pin Register Map  
Address  
Symbol  
Register Name  
Interface  
LPC Interface  
3100–3103h  
3104–3107h  
3108–310Bh  
310C–310Fh  
3110–3113h  
3114–3117h  
3118–311Ch  
D31IP  
D30IP  
D29IP  
D28IP  
D27IP  
D26IP  
D02IP  
Device 31 Interrupt Pin  
Device 30 Interrupt Pin  
Device 29 Interrupt Pin  
Device 28 Interrupt Pin  
Device 27 Interrupt Pin  
Device 26 Interrupt Pin  
Device 2 Interrupt Pin  
SDIO/MMC (Ports 1-3)  
USB Host (UHCI 1-3, EHCI)  
PCI Express (Ports 1 and 2)  
Intel HD Audio  
USB Target  
Intel GMA 500  
74  
Datasheet