Signal Description
Power
Well
Signal Name
Type
Description
System Management Interrupt: This signal is
generated by the external system management
controller.
I
SMI#
Core
CMOS3.3
I
EXTTS0#
Core
Core
External Thermal Sensor 0 Event
CMOS3.3
I
External Thermal Sensor 1 Event: EXTTS1# is
multiplexed with GPIO9
EXTTS1#/GPIO9
CMOS3.3
Host Bus Speed Select: At the deassertion of
RESET#, the value sampled on BSEL2 determines
the expected frequency of the bus. Refer to Table 3
for more details.
I
BSEL2
Core
Core
CMOS
Configuration: Strap pins used to configure the
graphics/display clock frequency. Refer to Table 3 for
more details.
I
CFG[1:0]
CMOS
2.15
General Purpose I/O
Power
Well
Signal Name
Type
Description
General Purpose I/O #9/External Thermal Sensor
1: This GPIO can function as a second external thermal
sensor input.
I/O
CMOS3.3
GPIO9/EXTTS1#
Core
General Purpose I/O #8/Processor Hot: Defaults to
a GPIO.
I/O
CMOS3.3
/
GPIO8/
PROCHOT#
Core
Core
As PROCHOT#, this signal can function as an Open-
Drain output to the processor or SMC to signify a
processor thermal event.
OD
I/O
CMOS3.3
General Purpose I/O: These signals are powered off
of the core well power plane within the Intel® SCH.
GPIO[6:0]
Resume Well General Purpose I/O #3/USB Client
Connect: This GPIO can function as an input signifying
connection to an external USB host.
GPIOSUS3/
USBCC
I/O
CMOS3.3
Sus
Sus
NOTE: If a USB Client is enabled in the system, then
GPIOSUS3 cannot be used as a general purpose
I/O.
General Purpose I/O: These signals are powered from
the suspend well power plane within the Intel® SCH.
They are accessible during the S3 sleep state.
I/O
CMOS3.3
GPIOSUS[2:0]
44
Datasheet
INTEL [ INTEL ]
