Introduction
1.3.10
1.3.11
Secure Digital I/O (SDIO)/Multimedia Card (MMC)
Controller
The Intel® SCH contains three SDIO/MMC expansion ports used to communicate with a
variety of internal or external SDIO and MMC devices. Each port supports SDIO
Revision 1.1 and MMC Revision 4.1 and is backward-compatible with previous interface
specifications.
SMBus Host Controller
The Intel® SCH contains an SMBus host interface that allows the processor to
communicate with SMBus slaves. This interface is compatible with most I2C devices.
The Intel® SCH SMBus host controller provides a mechanism for the processor to
initiate communications with SMBus peripherals (slaves). See the System Management
Bus (SMBus) Specification, Version 1.0.
1.3.12
Intel® High Definition Audio (Intel® HD Audio) Controller
The Intel® High Definition Audio Specification defines a digital interface that can be
used to attach different types of codecs (such as audio and modem codecs). The Intel
HD Audio controller supports up to four audio streams, two in and two out.
With the support of multi-channel audio stream, 32-bit sample depth, and sample rate
up to 192 kHz, the Intel HD Audio controller provides audio quality that can deliver
consumer electronic (CE) levels of audio experience. On the input side, the Intel® SCH
adds support for an array of microphones.
The Intel HD Audio controller uses a set of DMA engines to effectively manage the link
bandwidth and support simultaneous independent streams on the link. The capability
enables new exciting usage models with Intel HD Audio (e.g., listening to music while
playing a multi-player game on the Internet.) The Intel HD Audio controller also
supports isochronous data transfers allowing glitch-free audio to the system.
1.3.13
1.3.14
General Purpose I/O (GPIO)
The Intel® SCH contains a total of 14 GPIO pins. Ten GPIOs are powered by the core
power rail and are turned off during sleep modes (S3 and higher). The remaining four
GPIOs are powered by the Intel® SCH suspend well power supply. These GPIOs remain
active during S3. The suspend well GPIOs can be used to wake the system from the
Suspend-to-RAM state.
The GPIOs are not 5-V tolerant.
Power Management
The Intel® SCH contains a mechanism to allow flexible configuration of various device
maintenance routines as well as power management functions including enhanced
clock control and low-power state transitions (e.g., Suspend-to-RAM and Suspend-to-
Disk). A hardware-based thermal management circuit permits software-independent
entrance to low-power states. The Intel® SCH contains full support for the Advanced
Configuration and Power Interface (ACPI) Specification, Revision 3.0.
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Datasheet
INTEL [ INTEL ]
