Introduction
1.3
Overview
The Intel® SCH is designed for use with Intel Atom processor Z5xx series-based
platforms. The Intel® SCH connects to the processor as shown in Figure 1.
The Intel® SCH incorporates a variety of PCI functions as listed in Table 1.
Table 1.
PCI Devices and Functions
Device
Function
Function Description
0
2
0
0
0
0
0
1
0
1
2
7
0
1
2
0
1
Host Bridge
Integrated Graphics and Video Device
USB Client
26
27
Intel® High Definition Audio (Intel® HD Audio) Controller
PCI Express Port 1
28
PCI Express Port 2
USB Classic UHCI Controller 1
USB Classic UHCI Controller 2
USB Classic UHCI Controller 3
USB2 EHCI Controller
29
SDIO/MMC Port 0
30
31
SDIO/MMC Port 1
SDIO/MMC Port 2
LPC Interface
PATA Controller
NOTE: All devices are on PCI Bus 0.
1.3.1
Processor Interface
The Intel® SCH supports the Intel Atom processor Z5xx series subset of the Enhanced
Mode Scalable Bus Protocol, and implements a low-power CMOS bus. The Intel® SCH
supports a single bus agent with FSB data rates of 400 MT/s and 533 MT/s. The Intel®
SCH features include:
• Intel Atom processor Z5xx series support
• CMOS frontside bus signaling for reduced power
• 400-MT/s or 533-MT/s data rate operation
• 64-Byte cache-line size
• 64-bit data bus, 32-bit address bus
• Supports one physical processor attachment with up to two logical processors
• 16 deep IOQ
• 1 deep defer queue
• FSB interrupt delivery
• Power-saving sideband control (DPWR#) for enabling/disabling processor data
input sense amplifiers
• 1.05-V VTT operation
Datasheet
23
INTEL [ INTEL ]
