Graphics, Video, and Display (D2:F0)
9.4.7
HEADTYP—Header Type Register
Register Address:
Default Value:
0Eh
00h
Attribute:
Size:
RO
8 bits
Default
Bit
and
Description
Access
0
RO
Multi Function Status (MFunc): Integrated graphics is a single
function.
7
0000000b
RO
6:0
Header Code (HDR): Indicates a Type 0 header format.
9.4.8
MEM_BASE—Memory Mapped Base Address Register
Register Address:
Default Value:
10h–13h
00000000h
Attribute:
Size:
RO, R/W
32 bits
This register requests allocation for the Intel Graphics Media Adapter registers and
instruction ports. The allocation is for 512 KB.
Default
Bit
and
Description
Access
0000h
R/W
Base Address (BA): Set by the OS, these bits correspond to Address
Signals 31:19.
31:19
18:1
0:0
0000h
RO
Reserved
0
RO
Resource Type (RTE): Indicates a request for memory space.
9.4.9
IO_BASE—I/O Base Address Register
Register Address:
Default Value:
14h–17h
00000000h
Attribute:
Size:
RO, R/W
32 bits
This register provides the base offset of 8 bytes of I/O registers within this device.
Access to I/O space is allowed in the D0 state and CMD.IOSE is set. Access is
disallowed in states D1–D3 or if CMD.IOSE is cleared or if this device is disabled.
Access to this space is independent of VGA functionality.
Default
Bit
and
Description
Access
0000h
RO
31:16
15:3
2:1
Reserved
0000h
R/W
Base Address (BA): Set by the OS, these bits correspond to Address
Signals 15:3.
00b
RO
Reserved
1
RO
0:0
Resource Type (RTE): Indicates a request for I/O space.
Datasheet
107
INTEL [ INTEL ]
