DRAM Controller Registers (D0:F0)
5.3.5
EPLE2A—EP Link Entry 2 Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/PXPEPBAR
68–6Fh
0000000000008000h
RO
Size:
64 bits
This register provides the second part of a Link Entry which declares an internal link to
another Root Complex Element.
Bit
Access &
Default
Description
63:28
27:20
19:15
14:12
11:0
RO
0s
Reserved
RO
0s
Bus Number (BUSN):
RO
00001b
Device Number (DEVN): Target for this link is PCI Express x16 port
(Device 1).
RO
000b
Function Number (FUNN):
RO
0s
Reserved
§
Datasheet
161
INTEL [ INTEL ]
