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298596-004 参数 Datasheet PDF下载

298596-004图片预览
型号: 298596-004
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔赛扬处理器的PGA370插槽高达1.40 GHz的0.13微米工艺 [Intel Celeron Processor for the PGA370 Socket up to 1.40 GHz on 0.13 Micron Process]
分类和应用:
文件页数/大小: 82 页 / 1417 K
品牌: INTEL [ INTEL ]
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Intel® Celeron® Processor for PGA370 up to 1.40 GHz on 0.13 µ Process  
Table 12. 3.3 Volt CMOS Output Signal Group DC Specifications  
Symbol  
Parameter  
Nominal Voltage  
Min  
Max  
Unit  
Notes  
3.3 + 5%  
V
3.45  
0.9  
V
V
VOH  
ILO  
Output High Voltage  
Output Leakage Current  
100  
µA  
2.12  
AGTL System Bus Specifications  
It is recommended that the AGTL bus be routed in a daisy-chain fashion with termination resistors  
to VTT. These termination resistors are placed electrically between the ends of the signal traces and  
the VTT voltage supply. The valid high and low levels are determined by the input buffers using a  
reference voltage called VREF. Refer to the appropriate platform design guide for more information  
Table 13 lists the nominal specification for the AGTL termination voltage (VTT). The AGTL  
reference voltage (VREF) is generated on the system motherboard and should be set to 2/3 VTT for  
the processor and other AGTL logic. It is important that the baseboard impedance be specified and  
held to a ±15% tolerance, and that the intrinsic trace capacitance for the AGTL signal group traces  
is known and well-controlled. For more details on the AGTL buffer specification, see the  
Intel® Pentium® II Processor Developer's Manual and AP-585, Intel® Pentium® II Processor  
AGTL Guidelines.  
Table 13. Processor AGTL Bus Specifications  
1,2  
Symbol  
Parameter  
Min  
Typ  
Max  
Units  
Notes  
VTT  
Bus Termination Voltage  
1.1375  
1.25  
56  
V
3
4
5
On-die RTT Termination Resistor  
50  
115  
68  
VREF  
Bus Reference Voltage  
2/3VTT  
V
NOTES:  
1. Unless otherwise noted, all specifications in this table apply to the processor up to 1.40 GHz frequency.  
2. The processor for the PGA370 socket contain AGTL termination resistors on the processor die, except for the  
RESET# input.  
3. VTT must be held to 1.25 V ±9%. It is required that VTT be held to 1.25 V ±3% while the processor system bus  
is idle (static condition). This is measured at the PGA370 socket pins on the bottom side of the baseboard.  
4. Uni-processor platforms require a 56 resistor and dual-processor platforms require a 68resistor.  
Tolerance for on-die Rtt is ±10% (56 , 68 resistors). Rtt is ±15% (100 resistors).  
5. VREF is generated on the motherboard and should be 2/3 VTT ±5% nominally. Insure that there is adequate  
VREF decoupling on the motherboard.  
30  
Datasheet