Intel® Celeron® Processor for PGA370 up to 1.40 GHz on 0.13 µ Process
Table 10. AGTL Signal Group Levels Specifications
1
Symbol
Parameter
Min
Max
Unit
Notes
VIL
Input Low Voltage
Input High Voltage
Buffer On Resistance
VREF - 0.200
V
V
Ω
6
VIH
VREF + 0.200
2, 3, 6
5
Ron
16.67
±100
Leakage Current for inputs,
outputs, and I/O
IL
µA
4, 7
NOTES:
1. Unless otherwise noted, all specifications in this table apply to the processor at a frequency up to 1.40 GHz
on 0.13 micron.
2. All inputs, outputs, and I/O pins must comply with the signal quality specifications in Section 3.0.
3. Minimum and maximum VTT are given in Table 13 on page 30.
4. (0 ≤ VIN ≤ 1.25 V +3%) and (0≤VOUT≤1.25 V+3%).
5. Refer to the processor I/O Buffer Models for I/V characteristics.
6. Steady state input voltage must not be above VSS + 1.65 V or below VTT – 1.65 V.
7. Does not apply to Vcc leakage current due to the presence of on-die RTT.
Table 11. Non-AGTL Signal Group Levels Specifications
1
Symbol
Parameter
Input Low Voltage
Min
Max
Unit
Notes
VIL
0.4
Vcmos_ref - 0.300
0.36
V
V
V
V
V
11
10
8
1.2
1.5
1.8
2.0
VIL
VIL
VIL
Input Low Voltage
Input Low Voltage
Input Low Voltage
Input High Voltage
–0.150
-0.36
-0.40
1.03
0.40
9
VIH
11
1.2
1.5
Vcmos_ref +
0.250
VCC_CMOS1.5 +
10%
VIH
Input High Voltage
V
V
6, 10, 12
12, 13
Vcmos_ref +
0.200
VIH
Input High Voltage PICD[1:0]
2.0
1.5PICD
VIH
VIH
Input High Voltage
Input High Voltage
1.44
1.60
2.16
V
V
Ω
8
9
2
1.8
2.0
Ron
30
7, 9, All
VOL
Output Low Voltage
0.30
V
outputs are
open-drain
IOL
ILI
Output Low Current
10
mA
µA
µA
Input Leakage Current
Output Leakage Current
±100
±100
3, 6
ILO
3, 4, 6, 7
NOTES:
1. Unless otherwise noted, all specifications in this table apply to the processor up to 1.40 GHz frequency on
0.13 micron.
2. Parameter measured at 9 mA (for use with TTL inputs).
3. (0 ≤ VIN ≤ 1.8 V +10%).
4. (0 ≤ VOUT ≤ 1.8 V +10%).
5. For BCLK specifications, refer to Table 24 on page 41.
6. (0 ≤ VIN ≤ 1.5 V +10%).
7. (0 ≤ VOUT ≤ 1.5 V +10%).
8. Applies to non-AGTL signal PWRGOOD.
9. Applies to non-AGTL signal PICCLK.
10.Applies to non-AGTL signals except BCLK, PICCLK, and PWRGOOD.
11.Applies to non-AGTL signal VTT_PWRGD.
12.Vcmos_ref = 2/3 Vcc_cmos1.5, refer to Table 7 on page 26.
13.Applies to PICD[1:0] only
Datasheet
29
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