E
FAST BOOT BLOCK DATASHEET
Note 1
Note 2
Note 3
Note 4
Note 5
VIH
VIL
Valid Address
Valid Address
A20-0 (A)
W12
W11
W6
W8
VIH
VIL
ADV# (V)
W4
W7
Note 6
VIH
VIL
CE# (WE#) [E(W)]
OE# [G]
W2
W9
W16
VIH
VIL
W1
W13
VIH
VIL
WE# (CE#) [W(E)]
Note 6
W3
W5
W10
W19
VIH
VIL
Valid
SRD
Data In
Data In
DATA [D/Q]
RST# [P]
WP# [B]
VIH
VIL
W14
W15
W17
W18
VIH
VIL
VPPH1/2
VPPLK
VIL
VPP [V]
NOTES:
1.
2. Write block erase or program setup.
V
power-up and standby.
CC
3. Write block erase confirm or valid address and data.
4. Automated erase or program delay.
5. Read status register data.
6. For read operations, OE# and CE# must be driven active, and WE# de-asserted.
Figure 20. AC Waveform for Write Operations
39
PRODUCT PREVIEW
INTEL [ INTEL ]
