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10M08SCU169I7G 参数 Datasheet PDF下载

10M08SCU169I7G图片预览
型号: 10M08SCU169I7G
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 8000-Cell, CMOS, PBGA169, 11 X 11 MM, 0.80 MM PITCH, ROHS COMPLIANT, UBGA-169]
分类和应用: 可编程逻辑
文件页数/大小: 68 页 / 976 K
品牌: INTEL [ INTEL ]
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M10-DATASHEET  
2015.05.04  
32  
Periphery Performance Specifications  
Parameter  
Symbol  
TS  
Condition  
Min  
Typ  
Max  
50  
5
Unit  
Temperature sampling rate  
Absolute accuracy  
kSPS  
°C  
–40 to 125°C,  
On-Chip Tempera‐  
ture Sensor  
with 64 samples  
averaging  
(48)  
Single measurement  
1
1
Cycle  
Cycle  
Continuous  
Conversion Rate (49) Conversion time  
measurement  
Temperature  
measurement  
1
Cycle  
Related Information  
Guidelines: Board Design for Analog Input, MAX 10 Analog-to-Digital Converter User Guide  
Provides more information about the conversion rate and RC equation.  
Periphery Performance Specifications  
This section describes the periphery performance, high-speed I/O, and external memory interface.  
Actual achievable frequency depends on design and system specific factors. Ensure proper timing closure in your design and perform HSPICE/  
IBIS simulations based on your specific design and system setup to determine the maximum achievable frequency in your system.  
High-Speed I/O Specifications  
For more information about the high-speed and low-speed I/O performance pins, refer to the respective device pin-out files.  
Related Information  
Documentation: Pin-Out Files for Altera Devices  
(48)  
For the Quartus II software version 15.0 and later, Altera Modular ADC and Altera Modular Dual ADC IP cores handle the 64 samples averaging.  
For the Quartus II software versions prior to 14.1, you need to implement your own averaging calculation.  
(49)  
For more detailed description, refer to Timing section in the MAX 10 Analog-to-Digital Converter User Guide.  
MAX 10 FPGA Device Datasheet  
Send Feedback  
Altera Corporation  
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