A10-DATASHEET
2015.12.31
108
Document Revision History
Date
Version
Changes
•
Updated I/O PLL specifications.
•
•
Updated fOUT_C to fOUT and updated the maximum value to 644 MHz for all speed grades.
Updated fOUT_EXT maximum value to 800 MHz (–1 speed grade), 720 MHz (–2 speed grade), and 650
MHz (–3 speed grade).
•
Removed fRES parameter.
•
•
Updated the description in Periphery Performance Specifications to mention that proper timing closure is
required in design.
Updated AS Timing Parameters for AS x1 and AS x4 Configurations in Arria 10 Devices.
•
•
Updated tSU minimum value from 1.5 ns to 0 ns.
Updated tH minimum value from 0 ns to 2.5 ns.
•
•
•
Updated CLKUSRinitialization clock source maximum frequency from 125 MHz to 100 MHz for passive
configuration schemes (PS and FPP).
Added uncompressed .rbf sizes and minimum configuration time estimation for Arria 10 GX and GS
devices.
Updated uncompressed .rbf sizes for Arria 10 GX 900 and 1150 devices, and Arria 10 GT 900 and 1150
devices.
•
•
Updated configuration .rbf size from 335,106,890 bits to 351,292,512 bits.
Updated IOCSR .rbf size from 6,702,138 bits to 1,885,396 bits.
•
Updated minimum configuration time estimation for Arria 10 GX 900 and 1150 devices, and Arria 10 GT
900 and 1150 devices for the following configuration modes:
•
•
Active serial: Updated from 837.77 ms to 883.20 ms.
Fast Passive Parallel: Updated from 104.72 ms to 110.40 ms.
Arria 10 Device Datasheet
Send Feedback
Altera Corporation
INTEL [ INTEL ]
