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10AS066K4F40E3SG 参数 Datasheet PDF下载

10AS066K4F40E3SG图片预览
型号: 10AS066K4F40E3SG
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 660000-Cell, CMOS, PBGA1517, 40 X 40 MM, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 110 页 / 1391 K
品牌: INTEL [ INTEL ]
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A10-DATASHEET  
2015.12.31  
41  
DSP Block Specifications  
Performance  
Mode  
Unit  
–E1L, –E1M  
(60), –E1S  
–I1L, –  
–E2L, –E2S, – –I2L, –I2S, –  
–E1M (61), –  
E3S, –E3V  
–I1M (61), –  
I3S, –I3V  
I1M (60), –I1S  
E2V  
I2V  
Fixed-point 18 × 18 multiplier adder  
summed with 36-bit input mode  
539  
517  
444  
422  
349  
326  
MHz  
Fixed-point 18 × 19 systolic mode  
Complex 18 × 19 multiplication mode  
Floating point multiplication mode  
Floating point adder or substract mode  
548  
548  
548  
488  
483  
529  
528  
527  
471  
465  
459  
456  
447  
388  
386  
440  
438  
427  
369  
368  
370  
364  
347  
288  
290  
351  
346  
326  
266  
270  
MHz  
MHz  
MHz  
MHz  
MHz  
Floating point multiplier adder or  
substract mode  
Floating point multiplier accumulate  
mode  
510  
490  
418  
393  
326  
294  
MHz  
Floating point vector one mode  
Floating point vector two mode  
502  
474  
482  
455  
404  
383  
382  
367  
306  
293  
282  
278  
MHz  
MHz  
Table 40: DSP Block Performance Specifications for Arria 10 Devices (VCC and VCCP at 0.95 V Typical Value)—Preliminary  
Performance  
Mode  
Unit  
–I1L, –I1M (60), –I1S  
–I2L, –I2S  
517  
Fixed-point 18 × 19 multiplication mode  
Fixed-point 27 × 27 multiplication mode  
Fixed-point 18 × 18 multiplier adder mode  
635  
633  
635  
631  
MHz  
MHz  
MHz  
MHz  
517  
516  
Fixed-point 18 × 18 multiplier adder summed with 36-bit input  
mode  
509  
Fixed-point 18 × 19 systolic mode  
635  
516  
MHz  
(60)  
(61)  
When you power VCC and VCCP at nominal voltage of 0.90 V.  
When you power VCC and VCCP at lower voltage of 0.83 V.  
Arria 10 Device Datasheet  
Send Feedback  
Altera Corporation  
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