XMC4500
XMC4000 Family
Electrical Parameters
Table 41
USIC SSC Slave Mode Timing
Parameter
Symbol
Min.
Values
Unit Note /
Test Condition
Typ. Max.
DX1 slave clock period
tCLK SR 66.6
t10 SR 3
−
−
−
−
ns
ns
Select input DX2 setup to
first clock input DX1 transmit
edge1)
Select input DX2 hold after t11 SR 4
last clock input DX1 receive
edge1)
−
−
−
−
−
ns
ns
ns
ns
Receive data input
t12 SR 6
−
DX0/DX[5:3] setup time to
shift clock receive edge1)
Data input DX0/DX[5:3] hold t13 SR 4
time from clock input DX1
receive edge1)
−
Data output DOUT[3:0] valid t14 CC 0
24
time
1) This input timing is valid for asynchronous input signal handling of slave select input, shift clock input, and
receive data input (bits DXnCR.DSEN = 0).
Data Sheet
73
V1.0, 2013-01
Subject to Agreement on the Use of Product Information
INFINEON [ Infineon ]
