XMC4500
XMC4000 Family
Electrical Parameters
3.3.8
Embedded Trace Macro Cell (ETM) Timing
The data timing refers to the active clock edge. The XMC4500 ETM uses the half-rate
clocking mode. In this mode both, the rising and falling clock edges are active clock
edges.
Note: These parameters are not subject to production test, but verified by design and/or
characterization.
Note: Operating conditions apply, with CL ≤ 15 pF.
Table 39
ETM Interface Timing Parameters
Symbol Values
Typ. Max.
Parameter
Unit Note /
Test Condition
Min.
t1 CC 16.7
TRACECLK period
TRACECLK high time
TRACECLK low time
–
–
–
–
–
–
–
3
ns
ns
ns
ns
–
t2 CC
t3 CC
t4 CC
2
2
–
–
–
–
TRACECLK and
TRACEDATA rise time
TRACECLK and
TRACEDATA fall time
t5 CC
–
–
–
3
3
ns
ns
–
–
TRACEDATA output valid t6 CC -2
time
t1
TRACECLK
t2 t5 t3 t4
Figure 18
ETM Clock Timing
TRACECLK
t6
t6
TRACEDATA
Figure 19
ETM Data Timing
Data Sheet
71
V1.0, 2013-01
Subject to Agreement on the Use of Product Information
INFINEON [ Infineon ]
