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XDPS21081 参数 Datasheet PDF下载

XDPS21081图片预览
型号: XDPS21081
PDF下载: 下载PDF文件 查看货源
内容描述: [英飞凌 XDPS21081 是一款反激式控制器IC,其初级侧引入 ZVS (零电压开关),通过简化电路和经济型开关来实现更高的工作效率。与传统的谷值开关方案相比,通过驱动外部低压开关产生负电流使主高压开关 MOSFET 放电,从而进一步降低开关损耗。 为了以同步整流实现更高效率,XDPS21081 多模式数字强制准谐振 (FQR) 反激控制器 IC 通过谷值检测来确保 DCM (非连续导通模式)工作模式,从而实现更安全可靠的运行。]
分类和应用: 开关反激控制驱动控制器高压
文件页数/大小: 55 页 / 2141 K
品牌: INFINEON [ Infineon ]
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Forced Quasi Resonant ZVS flyback controller  
Functional Description  
vDrain(t)  
NPri / NSec × vSec  
VBulk  
t
Forced frequency  
resonant mode  
vZVS(t)  
NZVS / NSec × vSec  
0
t
NZVS / NPri × VBulk  
iMag(t)  
tf  
tZVSdelay  
0
t
t
vGD0(t)  
tSWperiod  
tGD0On  
tGD0Off  
vGD1(t)  
tZVSdead  
tGD1on  
tGD1Off  
t
t1 t2 t3  
t4  
t5  
t1 t2 t3  
t4  
FFR_MODE_SIGNALS  
Figure 29 Signal overview for forced frequency resonant mode operation  
The length of the ZVS pulse and the charged voltage of the ZVS capacitor determine the amount of introduced negative  
transformer magnetization. A higher level of introduced negative magnetization leads to a lower drain voltage swing down,  
which could further optimize the switching losses and high frequency EMI behavior of the main power MOSFET. However,  
as this comes along with the expense of increased power losses associated with the additional ZVS pulse generation, a trade  
off needs to be found to maximize the potential increase in efficiency and reduction in EMI. Depending on the chosen main  
power MOSFET different drain voltage levels might be adapted for turning on the main power MOSFET. This is mainly  
depending on the output capacitor characteristic of the power MOSFET, which is highly nonlinear increasing, when going  
for low drain voltages. The amount of necessary negative magnetization current increases with the size of the output  
capacitor of the power MOSFET and parasitic coupling capacitor of transformer. Therefore the dimensioning for the ZVS  
pulse generation is significantly depending on the system dimensioning. The default parameter set is optimized for a 65 W  
USB PD adapter.  
The required ZVS pulse length tGD1on is depending on VBulk. The GD1 on-time tGD1on needs to increase with increasing VBulk to  
ensure the same low drain voltage level for turning on the main power MOSFET for the whole VAC input range. Whereas the  
ZVS dead-time is fixed at tZVSdead = 236ns (see Chapter 5.2 ).  
The default configured relationship between tGD1on and VBulk and determined by following implemented equation:  
Data Sheet  
30  
Revision 2.0  
2020-08-20  
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