TLE9263QX
System Features
Table 8
Reasons for Fail-Safe - State of SPI Status Bits after Return to Normal Mode
Prev. SBC Failure Event
Mode
DEV_
STAT
TSD2
WD_
FAIL
VCC1_
UV
VCC1_
UV_FS
VCC1_
OV
VCC1_
SC
Normal
Normal
Normal
Normal
Normal
Normal
Stop
1 x Watchdog Failure 01
2 x Watchdog Failure 01
x
x
1
x
x
x
x
x
1
x
x
x
01
10
xx
xx
xx
xx
01
10
xx
xx
xx
xx
x
x
x
1
1
x
x
x
x
1
1
x
x
x
x
x
1
x
x
x
x
x
1
x
x
x
x
x
1
x
x
x
x
x
1
x
x
x
TSD2
01
01
01
01
x
VCC1 short to GND
4x VCC1 UV
x
x
VCC1 over voltage
1
x
1 x Watchdog Failure 01
2 x Watchdog Failure 01
Stop
x
Stop
TSD2
01
01
01
01
x
Stop
VCC1 short to GND
4x VCC1 UV
x
Stop
x
Stop
VCC1 over voltage
1
Note:An over voltage event on VCC1 will only lead to SBC Fail-Safe Mode if the bit VCC1_OV_RST is set and if
CFGP = ‘0’ (Config 2/4).
Note:The content of the WD_FAIL bits will depend on the device configuration, e.g. 1 or 2 watchdog failures.
Note:See Chapter 15.6.1 for detailed description of the 4x VCC1 under voltage behavior.
5.1.7
SBC Development Mode
The SBC Development Mode is used during the development phase of the module. It is especially useful for
software development.
Compared to the default SBC user mode operation, this mode is a super set of the state machine. The device will
start also in SBC Init Mode and it is possible to use all the SBC Modes and functions with following differences:
•
•
Watchdog is stopped and does not need to be triggered. Therefore no reset is triggered due to watchdog failure
SBC Fail-Safe and SBC Restart Mode are not reached due to watchdog failure but the other reasons to enter
these modes are still valid
•
LINx, CAN and VCC2 default value in SBC INIT MODE and entering SBC Normal Mode from SBC Init Mode
is ON instead of OFF
The SBC Software Development Mode is reached automatically if the FO3/TEST pin is set and kept LOW during
SBC Init Mode. The voltage level monitoring is started as soon as VS > VPOR,f. The Software Development Mode
is configured and maintained if SBC Init Mode is left by sending any SPI command while FO3/TEST is LOW. In
case the FO3/TEST level will be HIGH for longer than tTEST during the monitoring period then the SBC
Development Mode is not reached .
The SBC will remain in this mode for all conditions and can only be left by powering down the device
(VS < VPOR,f).
Data Sheet
30
Rev. 1.1, 2014-09-26
INFINEON [ Infineon ]
