TLE9263QX
System Features
The first sample of the WK input value (HIGH or LOW) is taken as the reference for the next cycle. A change of
the WK input value between the first and second cycle recognized during the on-time of the second cycle will
cause a wake from SBC Sleep Mode or an interrupt during SBC Normal or SBC Stop Mode.
A filter time of 16µs is implemented to avoid a parasitic wake-up due to transients or EMC disturbances. The filter
time tFWK1 is triggered right at the end of the selected on-time and a wake signal is recognized if:
•
the input level will not cross the switching threshold level of typ. 3V during the selected filter time (i.e. if the
signal will keep the HIGH or LOW level) and
•
there was an input level change between the current and previous cycle
Data Sheet
33
Rev. 1.1, 2014-09-26
INFINEON [ Infineon ]
