TLE 6244X
Description of the SPI Registers
Register: MUX_REG1
7
6
5
4
3
2
1
0
MUX7
MUX6
MUX5
MUX4
MUX3
MUX2
MUX1
MUX0
State of Reset: 80H
Access by Controller: Read/Write
Bit
0
Name
MUX0
MUX1
MUX2
MUX3
MUX4
MUX5
MUX6
MUX7
Description
Serial or parallel control of power stage 1
Serial or parallel control of power stage 2
Serial or parallel control of power stage 3
Serial or parallel control of power stage 4
Serial or parallel control of power stage 5
Serial or parallel control of power stage 6
Serial or parallel control of power stage 7
Serial or parallel control of power stage 8
1
2
3
4
5
6
7
Register: MUX_REG2
7
6
5
4
3
2
1
0
MUX15
MUX14
MUX13
MUX12
MUX11
MUX10
MUX9
MUX8
State of Reset: 00H
Access by Controller: Read/Write
Bit
0
Name
Description
MUX8
Serial or parallel control of power stage 9
Serial or parallel control of power stage 10
Serial or parallel control of power stage 11
Serial or parallel control of power stage 12
Serial or parallel control of power stage 13
Serial or parallel control of power stage 14
Serial or parallel control of power stage 15
Serial or parallel control of power stage 16
1
MUX9
2
MUX10
MUX11
MUX12
MUX13
MUX14
MUX15
3
4
5
6
7
Final Data Sheet
14
V4.2, 2003-08-29
INFINEON [ Infineon ]
