TLE 6244X
1.6.1 Serial/Parallel Control
Serial/Parallel Control of the Power Stages 1...16 and Serial Control (SPI) of the Power Stages 17 and
18:
The registers MUX_REG1/2 and the bmux-bit prescribe parallel control or serial control (SPI or µsec-
bus) of the power stages.
(SPI-Instructions: WR_MUX1...2, RD_MUX1...2, WR_SCON1...3, RD_SCON1...3)
The following table shows the truth table for the control of the power stages 1...18. The registers
MUX_REG1, 2 prescribe parallel-control or serial control of the power stages. The registers
SCON_REG1...3 prescribe the state of the power stage in case of SPI-serial control. BMUX deter-
mines parallel control or control by µsec-bus.
For the power stages 17 and 18 control is exclusively possible via SCON17/18. IN17/18 and
MUX17/18 do not exist. BMUX has no function for OUT17/18.
ABE
RST
INx
BMUX MUXx SCONx
µsec-
REGx
Output OUTx of Power Stage x,
x = 1..18
0
0
1
1
1
1
1
1
1
0
1
0
1
1
1
1
1
1
X
X
X
X
X
0
X
X
X
X
X
1
X
X
X
0
0
1
1
1
1
X
X
X
0
X
X
X
X
X
X
X
0
OUTx off
OUTx off
OUTx off
SPI Control: OUTx on
SPI Control: OUTx off
Parallel Control: OUTx on
Parallel Control: OUTx off
µsec-bus Control: OUTx on
µsec-bus Control: OUTx off
1
X
X
X
X
1
1
X
X
0
0
1
Exception: OUT8 is on (active) if IN8 is set to logic ‘1’ (and off if IN8 is set to logic ‘0’) in case of
parallel access.
Note: OUT8 cannot be controlled by the µsec-Bus. Refer to section 1.7.
Final Data Sheet
13
V4.2, 2003-08-29
INFINEON [ Infineon ]
