TLD7002-16ES
Datasheet
4 Power supply
the device is in active mode AND
•
•
an internal fault occurred and HSLI or ERRn is operational OR
VDD < VDD(UV)_fall
OR
PM_CHANGE(enter_init_mode) frame is received via the HSLI bus
OR
6 times sync_break is received via the HSLI bus as described in Chapter 9.1.11.9 to reset the device
OR
the device is in active mode AND a load fault has been detected
OR
the device is in active mode AND ERRN is active when VERRN < VERRN,th
.
4.4
Fail-off mode
In the ꢀail-off mode the device is reset, all output channels are switched OFF and the HSLIH and HSLIL bus
interface pins are floating.
The device enters into ꢀail-off mode in tFAIL_OFF in case of an internal fault when HSLI or ERRN is not operational.
4.5
Fail-safe mode
In fail-safe mode each output stage enters the desired safe state either ON or OFF.
The device enters into fail-safe mode in tACTIVE2FAILSAFE
•
•
•
•
if the device is in active mode and the timeout watchdog is triggered OR
if the device is in init mode and the timeout watchdog is triggered OR
if the device received an PM_CHANGE(enter_fail-safe) via the HSLI bus OR
if the GPIN warning occurs and the watchdog timeout is disabled.
The device exits the fail-safe mode into init mode in tFAILSAFE2INIT if
•
•
the device received a valid PM_CHANGE(enter_init_mode) frame via the HSLI OR
a 6 consecutive HSLI sync break frames trigger a device reset.
The device exits the fail-safe mode into active mode in tFAILSAFE2ACTIVE if
•
•
the device received a valid DC_UPDATE frame via the HSLI OR
GPIN warning cleared via HSLI HWCR frame
The safe state is set on the FAIL-SAFE MODE OTP register.
If the device reaches the fail-safe state, the duty cycle values and the output current of all and only the outputs
enabled in fail-safe state will be updated with the content of the OTP registers (OTP failsafe/GPIN0 DC register and
OTP ISET register).
4.6
Active mode
The device enters into active mode within tINIT2ACTIVE if:
•
•
•
•
•
the device is in init OR fail-safe mode AND
BISTs are pass in init mode AND
OTP is configured and locked OR OTP emulation is valid AND
the device received a valid DC_UPDATE command via the HSLI bus OR an activation request via GPINn AND
VDD>VDD_UV(rise) AND VS>VSOP(MIN)
Datasheet
15
Rev.1.00
2022-05-03
INFINEON [ Infineon ]
