TDA5235
Appendix
Register Description
Field
Bits
Type
Description
RMSPAC
2
r
RF PLL Run Mode Self Polling Actual Channel
0B
1B
No valid data in FIFO from any channel and configuration
Data in FIFO belong to Channel 1
Reset: 0H
UNUSED
SPMAC
1
0
r
r
UNUSED
Reset: 0H
RF PLL Self Polling Mode Actual Channel
0B
1B
No Wake Up from any Channel was actually found
Wake Up was found from Channel 1
Reset: 0H
RSSI Peak Detector Readout Register
RSSIPRX
Offset
0ABH
Reset Value
00H
RSSI Peak Detector Readout Register
ꢀ
ꢁ
566,35;
UF
Field
Bits
Type
Description
RSSIPRX
7:0
rc
RSSI Peak Level during Receiving
Tracking is active when Digital Receiver is enabled
Set at higher peak levels than stored
Cleared at Reset and SPI read out
Reset: 00H
RSSI Payload Peak Detector Readout Register
RSSIPPL
Offset
0ACH
Reset Value
00H
RSSI Payload Peak Detector Readout
Register
ꢀ
ꢁ
566,33/
U
Data Sheet
250
V1.0, 2010-02-19
INFINEON [ Infineon ]
