TDA5235
Appendix
Register Description
A_CDRTOLC
Offset
049H
Reset Value
0CH
CDR DC Chip Tolerance Register
ꢀ
ꢃ
ꢈ
ꢅ
ꢆ
ꢁ
8186('
72/&+,3+
72/&+,3/
ꢂ
Z
Z
Field
Bits
Type
Description
UNUSED
7:6
-
UNUSED
Reset: 0H
TOLCHIPH
5:3
w
Duty Cycle Tolerance for Chip Border High Level. Represents the
number of 1/16 bit sample deviation from the ideal chip border
where an edge can occur in direction to the following chip border.
Reset: 1H
TOLCHIPL
2:0
w
Duty Cycle Tolerance for Chip Border Low Level. Represents the
number of 1/16 bit sample deviation from the ideal chip border
where an edge can occur in direction to the previous chip border.
Reset: 4H
CDR DC Bit Tolerance Register
A_CDRTOLB
Offset
04AH
Reset Value
1EH
CDR DC Bit Tolerance Register
ꢀ
ꢃ
ꢈ
ꢅ
ꢆ
ꢁ
8186('
72/%,7+
72/%,7/
ꢂ
Z
Z
Field
Bits
Type
Description
UNUSED
7:6
-
UNUSED
Reset: 0H
TOLBITH
5:3
w
Duty Cycle Tolerance for Bit Border High Level. Represents the
number of 1/16 bit sample deviation from the ideal bit border where
an edge can occur in direction to the following bit border.
Reset: 3H
TOLBITL
2:0
w
Duty Cycle Tolerance for Bit Border Low Level. Represents the
number of 1/16 bit sample deviation from the ideal bit border where
an edge can occur in direction to the previous bit border.
Reset: 6H
Data Sheet
215
V1.0, 2010-02-19
INFINEON [ Infineon ]
